1. Field of the Invention
The present disclosure pertains to the field of signal transfer between components. More particularly, the present disclosure pertains to detection and in some cases the recovery from errors occurring in a source synchronous signal transmission system.
2. Description of Related Art
Reliability of a computer system is becoming an increasingly important characteristic. Although many parts of the computer system pose challenges with respect to reliability, high-speed connections between components are particularly prone to problems. Advances which improve the ability to detect and/or correct signaling errors of high-speed connections between components may therefore be highly beneficial in improving the overall reliability of a system.
Parity bits and error correction codes (ECC) are examples of well known techniques for detecting and/or correcting signal transmission errors. Both parity bits and error correction codes are typically computed for a set of bits by the bus. For example, a parity bit or error correction code may cover a the data bus or a subset thereof (e.g., a byte, word, double-word, etc.). If an error is detected by a receiver, some prior art techniques permit reconstruction of the original data so long as only a few bits of data are corrupted. However, if large portions of a bus are affected, parity and ECC techniques are typically unable to reconstruct the original data.
A source synchronous bus is a well known bus for high-speed transmission of signals. Source synchronous buses convey data in conjunction with strobe (may also be referred to as clock) signals, causing the strobe signals to experience the same or similar propagation delays as the transmitted data. The receiver uses the strobe signals or derivatives thereof to capture the conveyed data. Thus, source synchronous communication eliminates many problems of traditional, common clocked data transfers, such as flight time delays, and clock skew. Since the timing between strobe signals and the data are more tightly controlled than in common-clock buses, some source synchronous systems are able to achieve higher data transmission bandwidths.
However, strobe-based source-synchronous data transfers are particularly susceptible to noise. Since the strobe signals are used to capture the transmitted data, the integrity of the strobe signals becomes important to ensuring reliable data transmission. Strobe glitches may occur for a great number of reasons. For example, cross coupling of noise from other signal lines, clock jitter, power supply noise, silicon aging, and alpha particles, just to name a few. As signaling speeds increase and signaling voltages decrease, these glitch causing phenomena are likely to have an even greater impact, raising the frequency of glitches, and consequently increasing the probability of data corruption. If a strobe glitch occurs, the typical source synchronous system is not likely to have merely one or two data bits corrupted, but rather is likely to experience complete corruption of all data captured by that strobe signal because all data captured by that strobe is captured at the wrong time. Thus, prior art parity or ECC techniques aimed at correcting only a few bits are unlikely to be effective in combating errors induced by strobe glitches.
Some prior art techniques to combat glitch-induced errors attempt to filter out such glitches from the strobe signals (or internally buffered versions). Some prior art techniques merely detect or filter out such errors in certain manners and fail to specify how to react efficiently. One prior art techniques involves filtering out transitions on a particular strobe signal that occur within a particular time window after a transition on that strobe signal. Such an approach may be limited as it relies on the corrupted strobe itself to help remove the corruption. If multiple glitches occur on a strobe or if glitch timing circumvents the filter, such self-filtering may not be effective. Additionally, prior art techniques may assume that filtering is successful, possibly still allowing corrupt data to be processed if that assumption is incorrect.
Thus, it would be advantageous to develop improved techniques to cope with signal corruption on a source synchronous bus.